The present invention relates to a semiconductor device, particularly, a self-aligned field effect transistor formed on a GaAs substrate as a MES structure, and to a method of manufacturing the same.
Such a conventional self-aligned field effect transistor, as shown in FIG. 1, comprises a semi-insulating GaAs substrate 1, an n conductivity type GaAs layer (active layer) 2 having thickness of a few thousands angstrom formed by implanting donor ion into the GaAs substrate 1, a gate electrode 3 formed on a surface of the GaAs layer 2, n+type GaAs layers 4 and 5 with low resistivity (source and drain regions) formed by implanting donor ion with high concentration into the GaAs layer 2 at both sides of the gate electrode 3, and source and drain electrodes 6 and 7 formed on the surface of the low resistivity GaAs layers 4 and 5. The source and drain electrodes 6 and 7 are ohmic contacts to the GaAs substrate; the gate electrode 3 is a Schottky contact to the GaAs substrate.
In such a field effect transistor the n type GaAs layers 4 and 5 with low resistivity (the source and drain regions) are formed by the self-alignment process. That is, after the n type GaAs layer 2 is formed by ion implantation of donor ion, the gate electrode 3 is formed and then the n+type GaAs layers 4 and 5 with low resistivity are formed by implanting the donor ion with high concentration into the GaAs substrate 1 with the use of the gate electrode 3 as mask, thereafter the source and drain electrodes 6 and 7 are formed on the low resistivity GaAs layers 4 and 5, so that the essential space between the n+type GaAs layers (source and drain regions) 4 and 5 with low resistivity can be reduced to the length equal to that of the gate electrode 3, that is, to the extent of about 1 .mu.m.
In such a field effect transistor the material of the gate electrode 3 must be taken into consideration. That is, the heat treatment (800.degree. C. to 850.degree. C.) for recovery of crystallinity of the n type GaAs layers 4 and 5 (ion implanted layer) must be effected so that the gate electrode material should not be changed in quality at the temperature of 800.degree. C. to 850.degree. C. and the characteristics of rectifying contact between the gate electrode and the GaAs substrate should not be deteriorated by heat treatment with the temperature of 800.degree. C. to 850.degree. C.
For the gate electrode, material having such a characteristic has been developed. One gate electrode material is metal silicides having high melting point such as tungsten silicide, titanium silicide, tantalum silicide or the like. Schottky characteristics between these silicides and GaAs are stable at high temperature heat treatment but their resistivity is high and more than 200 .mu..OMEGA.m so that the gate electrode must be thickened.
The other gate electrode material is a pure tungsten-metal. The tungsten-metal is substantially low resistivity and the content between tungsten-metal and GaAs has comparatively low barrier height of the rectifying contact characteristics and low reverse breakdown voltage so that development of new gate material having low resistivity and high thermal resistance is expected.